Real-time multi-chip neural network for cognitive systems

This title presents novel real-time, reconfigurable, multi-chip SNN system architecture based on localised communication, which effectively reduces the communication cost to a linear growth.

The system use double floating-point arithmetic for the most biologically accurate cell behaviour simulation, and is flexible enough to offer an easy implementation of various neuron network topologies, cell communication schemes, as well as models and kinds of cells.

The system offers a high run-time configurability, which reduces the need for resynthesising the system.

In addition, the simulator features configurable on- and off-chip communication latencies as well as neuron calculation latencies.

All parts of the system are generated automatically based on the neuron interconnection scheme in use.