Evaluation of Shielding Packaging for Prevention of Electrostatic Damage to Sensitive Electronic Components

Certain electronic components, in particular field effect transistors (FETs) and other small semiconductor devices, can be damaged by electrostatic discharge (ESD) arising from normal handling operations.

Shielding bags are widely used in the electronics manufacturing industry to protect sensitive electronic components and assemblies from ESD.

The performance of these bags is uncertain. Test methods have until recently been unreliable, and pass/fail criteria have been poorly defined.

In contrast, electronic components have well defined levels of sensitivity, but there has been no attempt to correlate the performance of shielding bags with component sensitivity.

This report provides a review and appraisal of the standards in use for specification and testing of the performance of a range of currently available shielding bags, and an evaluation of a recent standard test method for demonstrating shielding bag performance.

A novel test developed by ERA provides a practical demonstration of the protection afforded to a bagged MOSFET test component, subjected to standard levels of ESD, and expressed as an ESD withstand voltage. The report also highlights where existing test methods may be insufficient.

It is primarily concerned with shielding bags used for the protection of components having a Human Body Model ESD senstivity of 100V to 4000V.

This covers the majority of components considered ESD sensitive in current electronics manufacturing, and falls within the broad scope of the EN 100015:1 1992 standard and draft IEC 1540-5-1 and -2 technical resports.

Extremely useful conclusions are drawn and recommendations are made concerning the status of sheilding bag performance and test methods.

There is a list of references.